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Please use this identifier to cite or link to this item: http://hdl.handle.net/2328/25827

Title: Architecture design of a fully asynchronous VLSI chip for DSP custom applications
Authors: Fan, Xingcha
Bergmann, Neil W
Keywords: Signal processing
Parallel architectures
Integrated circuits
Data analysis
Issue Date: 1992
Publisher: Institute of Electrical and Electronics Engineers Computer Society (IEEE Publishing)
Citation: Fan, X. and Bergmann, N. 1992. Architecture design of a fully asynchronous VLSI chip for DSP custom applications. 1992 Proceedings of the IEEE International Symposium on Circuits and Systems (ISCAS), vol. 5, 2112 - 2115.
Abstract: A fully asynchronous, distributed VLSI architecture is introduced for dedicated real-time digital signal processing applications. The architecture is based on a data-driven computing model to allow maximum exploitation of the fine-grained concurrency. An asynchronous, self-time signaling protocol is used in the architecture to naturally match data-driven computing and circumvent the clock skew problem. After a brief description of the architecture, key issues of the architecture, such as the interconnection network, data identification, and operand matching are discussed. Finally, disadvantages of the architecture and future work are outlined.
URI: http://hdl.handle.net/2328/25827
ISBN: 0780305930
Appears in Collections:Computer Science, Engineering and Mathematics - Collected Works

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